This paper implements a SPI module with the main functionality of the SPI communication protocol. Some microcontrollers might use terms such as Master-Out-Slave-In (MOSI) or data from master to slave and Master-In-Slave-Out (MISO) or data from slave to master and Slave Select (SS) or slave selector. It uses the following signals: Data In, Data Out, Clock and Chip Select (CS) or Enable. SPI is a standard used to control almost any digital electronic device that accepts a serial bit stream controlled by a clock. It is used to communicate microcontrollers with a variety of peripherals (A/D, EEPROMS, sensors, among others). The SPI protocol is a four-wire serial peripheral device that features a synchronous and bidirectional (full duplex), communication standard developed by Freescale (Leens, 2009). ![]() Finally conclusions on this work are provided. Experimental testing was made for the chip using specialized citcuitry. Once the design was completed, it was sent for fabrication and packaging using the MOSIS Educational Program. ![]() Then a test bench was prepared for verification design, followed by the place and route stage that was validated with the Alliance CAD tools before generating layouts files in a standar CIF format. After that, the synthesis flow of the Alliance CAD tools is used. Third, the logic design is developed in a hardware description language. Second, an architecture design of the entire system in a hierarchical way is proposed. This paper is organized as follows: first, the specification of what the chip must do is presented. The MOSIS Service (or MOSIS) provides manufacturing services at no cost to educational institutions with minimum financial support for non-profitable applications ( Staudhammer, 1997 The MOSIS Service, 2014). The manufacturing stage and packaging was made through the MOSIS Educational Program (MEP) ( Piña, 2002). Figure 1 shows a diagram of the method implemented in the design flow ( Ortega, 2009 Reyes, 2011). In this paper, the design methodology uses the Alliance CAD System tools for the design of a VLSI IC and is exemplified by the implementation of a communication protocol. This software allows the design and test of VLSI circuits, from the specification to the physical layout, providing libraries of cells that allow the design of independent circuits specific to the technology used in the manufacturing process. Alliance is an environment friendly CAD system licensed under GPN Linux ( LIP6, 2014 Silva, Yoshida, & Palacios, 2006). Alliance CAD System is the name of a complete set of CAD tools and VLSI design libraries that were developed in the Pierre et Marie Curie laboratory in Paris, France. Students, professors and researchers that carry out VLSI design can use the software tools that allow the design flow of VLSI ICs in their studies and research projects because the learning curve is short. Subsequently, the physical planes are generated in digital files that are sent for fabrication. Once the behavioral description of a digital system design has been coded in VHDL, the software tools that allow synthesis and verification to obtain the physical plane of the IC are deployed (this process is known as flow design). The design process begins with the specification of a digital system and its description through a hardware description language such as VHDL (very high speed integrated circuit hardware). In public education institutions, the cost of software licenses becomes a limiting factor as well as the fact that their use is complex by novice designers. Examples are Cadence Design System, Synopsys and Mentor Graphics among others that require the payment of annual licenses. Nowadays, there are sophisticated commercial computer aided design (CAD) tools for professional use in the design of integrated circuits (IC) with very large scale integration (VLSI) ( Weste et al., 2011). Los resultados mostraron la eficacia de la metodología de diseño VLSI empleada, así como la factibilidad de fabricación de diseños realizados en proyectos escolares cuyas fuentes de financiamiento sean insuficientes o nulas. Las pruebas se realizaron sobre una plataforma que transfiere los datos desde mediciones de un sensor inercial hacia el chip SPI diseñado, el cual a su vez envía los datos de nuevo por un bus paralelo hacia un microcontrolador común. El diseño físico fue enviado para su fabricación usando el proceso CMOS AMI C5 caracterizado por un tamaño de transistor de 0.5 micrometros, auspiciado por el programa educativo de MOSIS. La finalidad es mostrar cómo la tarea del diseño VLSI puede ser realizada por estudiantes o profesionistas, con un mínimo de recursos y experiencia. ![]() En este artículo se presenta la metodología usada en el diseño de un circuito integrado digital que implementa el protocolo de comunicación denominado Interface de Periféricos Serial, utilizando el sistema CAD Alliance.
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